Paper Reading Assignments:

  • Cryptographic Hardware
  • 1. Security evaluation of different AES implementations against practical setup time violation attacks in FPGAs

    2. Fault based cryptanalysis of the Advanced Encryption Standard

    3. Very Compact FPGA Implementation of the AES Algorithm

    4. A Logic Level Design Methodology for a Secure DPA Resistant ASIC or FPGA Implementation

  • PUFs
  • 5. Design and implementation of PUF-Based ‘unclonable’ RFID ICs for anti-counterfeiting and security applications

    6. Power-up SRAM state as an identifying fingerprint and source of true random numbers

    7. PUFatt: Embedded platform attestation based on novel processor-based PUFs

    8. Time-bounded authentication of FPGAs

    9. Techniques for design and implementation of secure reconfigurable PUFs

    10. RF-PUF: IoT security enhancement through authentication of wireless nodes using in-situ machine learning

    11. Bit String Analysis of Physical Unclonable Functions based on Resistance Variations in Metals and Transistors

    12. DRAM based Intrinsic physical unclonable functions for system level security

    13. A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation

  • Hardware Trojan
  • 14. Towards Trojan-Free Trusted ICs Problem Analysis and Detection Scheme

    15. MERO: A Statistical Approach for Hardware Trojan Detection

    16. Power supply signal calibration techniquesfor improving detection resolution to hardware Trojans

    17. Sensitivity analysis to hardware Trojans using powersupply transient signals

    18. SVM-based Real-Time Hardware Trojan Detection for Many-Core Platform

    19. Hardware Trojan Detection Through Chip-Free ElectromagneticSide-Channel Statistical Analysis

    20. Hardware Trojan detection using path delay fingerprint

    21. Trojan Scanner: Detecting Hardware Trojans with Rapid SEM Imaging combined with Image Processing and Machine Learning

    22. MERS Statistical Test Generation forSide-Channel Analysis Based Trojan Detection

  • Hardware IP Protection
  • 23. EPIC: Ending Piracy of Integrated Circuits

    24. Logic Encryption - A Fault Analysis Perspective

    25. Security Analysis of Logic Obfuscation

    26. Evaluating the Security of Logic Encryption Algorithms

    27. Anti-SAT: Mitigating SAT Attack on Logic Locking

    28. SARLock: SAT attack resistant logic locking